Conventional approaches to increase the performance of microprocessors often do not provide the performance boost one has hoped for due to diminishing returns. We propose the extension of a conventional hardwired microprocessor with a reconfigurable logic array, integrating both conventional and reconfigurable logic on the same die. Simulations have shown that even a comparatively simple and compact extension allows performance gains of 2–4 times over conventional RISC processors of comparable complexity, making this approach especially interesting for embedded microprocessors.
CITATION STYLE
Sawitzki, S., Gratz, A., & Spallek, R. G. (1998). Increasing microprocessor performance with tightly-coupled reconfigurable logic arrays. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 1482, pp. 411–415). Springer Verlag. https://doi.org/10.1007/bfb0055271
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