Novel approach of multiplier design using ancient vedic mathematics

Abstract

Multiplication is the fundamental operation in mathematics as well as in the field of engineering. Multiplier is the core part of Digital Signal Processor. In this paper a new approach of multiplier design using the Vedic mathematics has been proposed. The procedure of multiplication using Vedic mathematics is very simple, easy and time saving. The design approach of multiplier by using the popular sutra “Ekanyunena Purvena” of Vedic mathematics is very new and novel. This procedure is successfully presented in this paper. The simple algorithm, flow chart, mathematical expression etc. helps the design to understand easily. The core architecture of the multiplier has been also discussed in this paper. The method discussed in this paper is very helpful for some special type of multiplication, like where the multiplicand is an integer and the multiplier is 9 or array of 9 (for example 9 or 99 or 999 or so on). The less complexity is the most important advantage of this digital design.