A prototype pixel detector readout chip has been developed with a new front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors. In the new architecture neighbouring pixels communicate with one another. At the corner of each pixel summing circuits add the total charge deposited in each sub-group of 4 pixels. Arbitration logic assigns a hit to the summing circuit with the highest charge. In the case where incoming X-ray photons produce fluorescence-a particular issue in high-Z materials-the charge deposited by those fluorescent photons will be included in the charge sum provided that the deposition takes place within the volume of the pixels neighbouring the initial impact point. The chip is configurable such that either the dimensions of each detector pixel match those of one readout pixel or detector pixels are 4 times greater in area than the readout pixels. In the latter case event-by-event summing is still possible between the larger pixels. As well as this innovative analog front-end circuit, each pixel contains comparators, logic circuits and two 15-bit counters. When the larger detector pixels are used these counters can be configured to permit multiple thresholds in a pixel providing spectroscopic information. The prototype chip has been designed and manufactured in an 8-metal 0.13 μm CMOS technology. First measurements show an electronic pixel noise of ∼ 72 e-rms (Single Pixel Mode) and ∼ 140 e-rms (Charge Summing Mode). © 2007 IEEE.
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Ballabriga, R., Campbell, M., Heijne, E. H. M., Llopart, X., & Tlustos, L. (2007). The Medipix3 prototype, a pixel readout chip working in single photon counting mode with improved spectrometric performance. IEEE Transactions on Nuclear Science, 54(5), 1824–1829. https://doi.org/10.1109/TNS.2007.906163