Revisiting resistance speeds Up I/O-efficient LTL model checking

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Abstract

Revisiting resistant graph algorithms are those, whose correctness is not vulnerable to repeated edge exploration. Revisiting resistant I/O efficient graph algorithms exhibit considerable speed-up in practice in comparison to non-revisiting resistant algorithms. In the paper we present a new revisiting resistant I/O efficient LTL model checking algorithm. We analyze its theoretical I/O complexity and we experimentally compare its performance to already existing I/O efficient LTL model checking algorithms. © 2008 Springer-Verlag Berlin Heidelberg.

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Barnat, J., Brim, L., Šimeček, P., & Weber, M. (2008). Revisiting resistance speeds Up I/O-efficient LTL model checking. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4963 LNCS, pp. 48–62). https://doi.org/10.1007/978-3-540-78800-3_5

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