In recent years, so called FPGA-SoCs have been introduced by Intel (formerly Altera) and Xilinx. These devices combine multi-core processors with programmable logic. This paper analyzes the various memory and communication interconnects found in actual devices, particularly the Zynq-7020 and Zynq-7045 from Xilinx and the Cyclone V SE SoC from Intel. Issues such as different access patterns, cache coherence and full-duplex communication are analyzed, for both generic accesses as well as for a real workload from the field of video coding. Furthermore, the paper shows that by carefully choosing the memory interconnect networks as well as the software interface, high-speed memory access can be achieved for various scenarios.
CITATION STYLE
Göbel, M., Elhossini, A., Chi, C. C., Alvarez-Mesa, M., & Juurlink, B. (2017). A quantitative analysis of the memory architecture of FPGA-SoCs. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 10216 LNCS, pp. 241–252). Springer Verlag. https://doi.org/10.1007/978-3-319-56258-2_21
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