Fooling parity tests with parity gates

Abstract

We study the complexity of computing k-wise independent and ε-biased generators G : {0, l}n → {0,1}m. Specifically, we refer to the complexity of computing G explicitly, i.e. given x ∈ {0,1}n and i ∈ {0, l}log m computing the i-th output bit of G(x). [MNT90] show that constant depth circuits of size poly(n) cannot explicitly compute k-wise independent and ε-biased generators with seed length n ≤ 2log o(1). In this work we show that DLOGTIME-uniform constant depth circuits of size poly(n) with parity gates can explicitly compute k-wise independent and ε-biased generators with seed length n roughly log m ≪ 2log o(1)m. In some cases the seed length of our generators is optimal up to constant factors, and in general up to polynomial factors. To obtain our results, we show a new construction of combinatorial designs, and we also show how to compute, in DLOGTIME-uniform ACo, random walks of length logc n over certain expander graphs of size 2n. © Springer-Verlag 2004.