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Methodology for Development of High-κ Stacked Gate Dielectrics on III–V Semiconductors

  • Passlack M
Springer-Verlag, (2006), 403-467
DOI: 10.1007/1-4020-3078-9_12
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Passlack, M. (2006). Methodology for Development of High-κ Stacked Gate Dielectrics on III–V Semiconductors. In Materials Fundamentals of Gate Dielectrics (pp. 403–467). Springer-Verlag. https://doi.org/10.1007/1-4020-3078-9_12

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